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Memory divider : ウィキペディア英語版 | Memory divider
A memory divider is a ratio which is used to determine the operating clock frequency of computer memory in accordance with front side bus (FSB) frequency, if the memory system is dependent on FSB clock speed. Along with memory latency timings, memory dividers are extensively used in overclocking memory subsystems to find stable, working memory states at higher FSB frequencies. The ratio between DRAM and FSB is commonly referred to as "DRAM:FSB ratio". Memory dividers are only applicable to those chipsets in which memory speed is dependent on FSB speeds. Certain chipsets like nVidia 680i have separate memory and FSB lanes due to which memory clock and FSB clock are asynchronous and memory dividers are not used there. Setting memory speeds and overclocking memory systems in such chipsets are different issues which do not use memory dividers. This article is only applicable to those chipsets in which the memory clock is dependent on FSB clock. == Overview == Memory Dividers allows system memory to run slower than or faster than the actual FSB (Front Side Bus) speed. Ideally, Front Side Bus and system memory should run at the same clock speed because FSB connects system memory to the CPU. But, it is sometimes desired to run the FSB and system memory at different clock speeds. It is possible to run FSB and memory clock at different clock speeds, within certain limits of the motherboard and corresponding chipset. So, settings termed as Memory Divider or FSB/DRAM settings are available and are expressed in a "ratio" which control the difference in memory clock rate and FSB speed. Entry Level motherboards usually do not provide memory dividers to be changed and the memory dividers are managed by Memory Controller (if chipset supports memory dividers). High end motherboards meant for overclocking provide facilities to change memory dividers (if chipset support memory dividers). However, in certain chipsets memory dividers are not used, because in those systems memory speed is independent of FSB speed.
抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「Memory divider」の詳細全文を読む
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